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Altera_Forum's avatar
Altera_Forum
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16 years ago

Drive strength settings

Hello: Just starting with FPGA design When the FPGA (cyclone II) drives pins into a device with a specific loading value (i.e 10pf) , is there a calculation or rule thumb to estimate wha...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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There can't be a rule of thumb because the best setting also depends on signal speed and required rise time respectively acceptable signal delays. I usually choose minimum current for general purpose I/O, higher values possibly for clock lines or fast memory interfaces.

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I thought based on the parameters that you indicated (rise time , load capacitance, etc) that an estimated calculation can be made as a start up value. There are few cases as well where there is no chance to get a test point to put a scope on a particular signal. It will be nice in this case to use a theorical estimation instead of using the default setting even if the system is running ok.

thanks