Downloading ELF Process failed of Project

Dear Daixiwen

I check the Enet_rx_clk_pll component , it is one input three output ,

one input :

ENET0_RX_CLK - 125MHZ from Internet Chip

three output (All 125MHZ) :

enet_rx_clk_270 0° deg to Nios Process input "rx_clk_to_the_tse_mac"

enet_tx_clk_mac 90° deg to Nios Process input "tx_clk_to_the_tse_mac"

enet_tx_clk_phy 180° deg to ddr_o component input "outlock"

(ddr_o is ALTDDIO_OUT , three input , one output of link ENET0_GTX_CLK)

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And about ENET0_MDIO config (Verilog file) :

assign NET0_mdio_in = ENET0_MDIO;

assign ENET0_MDIO = NET0_mdio_oen ? 1'bz : NET0_mdio_out;

NET0_mdio_in : link to Nios process intput mdio_in_to_the_tse_mac

NET0_mdio_oen : from Nios Process output mdio_oen_from_the_tse_mac

NET0_mdio_out : from Nios Process output mdio_out_from_the_tse_mac

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and Nios II Windows have new message

info : phy[0.0] - checking link...

info : phy[0.0] - link established

warning : phy[0.0] - phy not found in phy profile

info : phy[0.0] - speed = 100 , duplex = full

ok , x=0 , cmd_config=0x00000000