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Altera_Forum's avatar
Altera_Forum
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14 years ago

doubt in design

sir i want to store 32 datas,output of some block,each 14 bit wide, in a ROM.how can i store the datas in rom after calculation instance after that generation block??? i have attched a sample design with this post. plz help:cry:

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  • Altera_Forum's avatar
    Altera_Forum
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    Are you talking about compile-time or run-time calculations? ROM data can be only set at compile-time (during synthesis), if the ROM is inferred in VHDL or Verilog and the respective language syntax for initialization constructs is used.