Forum Discussion
Altera_Forum
Honored Contributor
14 years agodoes altlvds have termination 100 ohm setting_
In my Desin, receiver pins from ADC are set to LVDS.
According to http://www.altera.com/literature/hb/stx2/stx2_sii52004.pdf (https://imail.datarespons.com/owa/redir.aspx?c=7c40eefd45214092bdb96db889f2a479&url=http%3a%2f%2fwww.altera.com%2fliterature%2fhb%2fstx2%2fstx2_sii52004.pdf), if pins are configured to LVDS, an 100 ohm termination is needed, and this termination is optional in stratix series. And rx pins are interfaced to altlvds module, perhaps this module has done this termination, do I still need to set this termination in manually, or altLVDS already set this for me_ Anybody knows this_ I appreciate any response.6 Replies
- Altera_Forum
Honored Contributor
You have to set the terminations explicitly. The ALTLVDS_RX component will not do it for you, since it can not know whether you have already used an external termination.
If you use Tcl, the constraint is of the form: set_instance_assignment -name STRATIXII_TERMINATION DIFFERENTIAL -to $port where $port is the signal name. Cheers, Dave - Altera_Forum
Honored Contributor
Hi Dave,
Thanks very much for the information. Quartus II v11.1 says "Stratix devices support internal differential termination with a nominal resistance value of 137.5 Ω for LVDS input receiver buffers." Strange, it needs 100 Ω, but the internal resistance is 137.5 Ω, why? - Altera_Forum
Honored Contributor
One more question, in my design, rx is assigned to rx(p), and LVDS standard is selected, the corresponding rx(n) is not connected to anything. Will the fitter assign rx(n) automatically to make a pair of them as a singal channel of rx? If so, is the termination still need?
- Altera_Forum
Honored Contributor
--- Quote Start --- One more question, in my design, rx is assigned to rx(p), and LVDS standard is selected, the corresponding rx(n) is not connected to anything. Will the fitter assign rx(n) automatically to make a pair of them as a singal channel of rx? If so, is the termination still need? --- Quote End --- The pairs are fixed on the FPGA. Quartus will infer the correct n pin. You can either let Quartus infer it, or you can make a pin assignment to the n pin. You just have to name it correctly, eg., "mysignal" for the p pin, and "mysignal(n)" for the n pin. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- Quartus II v11.1 says "Stratix devices support internal differential termination with a nominal resistance value of 137.5 Ω for LVDS input receiver buffers." Strange, it needs 100 Ω, but the internal resistance is 137.5 Ω, why? --- Quote End --- Table 5-31, page 165 of the Stratix II Handbook: http://www.altera.com/literature/lit-stx2.jsp Indicates the terminations are 100-Ohms +/-20 percent. Cheers, Dave - Altera_Forum
Honored Contributor
I got it, thanks very much!!!!!!!!!!!