Forum Discussion
ContributorDoes A10 GX device's banks need individual clocks input from the dedicated CLK pins for DDR4 ?
Hi xytech,
Thank you so much for the details clarification. It really helps to understand the issue better.
Yes, your understanding is correct. Since the current clock source is not a dedicated to the PLL that you want to use with your DDR4, then you need to add another clock device to feed the ref_clk. Please note that using additional clock will slightly give effect to the clock jitter and timing margin which also mentioned in the handbook.
Thanks
Regards,
NAli1
Frequent ContributorHi xytech,
Thank you so much for the details clarification. It really helps to understand the issue better.
Yes, your understanding is correct. Since the current clock source is not a dedicated to the PLL that you want to use with your DDR4, then you need to add another clock device to feed the ref_clk. Please note that using additional clock will slightly give effect to the clock jitter and timing margin which also mentioned in the handbook.
Thanks
Regards,
NAli1
ContributorThanks, NAli1.
By the way, may I ask how do Intel employee responds to different questions in different sections of forum? For example, someone posted two questions on two seperate thread about A10 GX device and Cyclone 10 LP device, will there be specific Intel personel to deal with them respectively according to devices families, or just handle these questions randomly if any intel gyus read the new threads? Thanks.
