Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Does a configured FPGA need loading a configure file and initialization at power on?

Hi, Everyone, I am a CPLD user and thinking to use a FPGA (Cyclone II) for my next design. I have a FPGA beginer's question. Does a programmed/configured FPGA (Cyclone II or III) need to load a co...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thank you Cris72. I though I can use a FPGA (Cyclone II, or III) as a big CPLD. Based on what you say, I have to have a EPROM or a host microprocessor to hold the configuration file and down load this file to the FPGA at every power up. The FPGA will lost the configure information when it is power down. Is there no place to hold this information inside the FPGA? If that is true, what is the purpose to use a JTAG to program the FPGA? I though it is the same as I program a CLPD using a JTAG cable.

Thanks.