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Altera_Forum
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8 years ago

Documentation discrepency for MAX10m50 pin outs

Hi All, I am designing a board with a MAX10m50SCE144. I downloaded the Excel pinout spreadsheet which shows CLK0n and CLK0p on pins 25 & 26 and CLK1n and CLK1p are on 27 & 28. But in the Quartus...
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Altera_Forum
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8 years ago

Hi Scott,

Can you provide the screenshot of pin conflicts?

we have checked the document but not able to get the conflict.The Quartus pin planner for device MAX10m50SCE144 with Device Excel pinout spreadsheet is same.

find the attachment for screenshot.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

Intel Customer Support – Engineering

(Under Contract to Intel)