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Honored Contributor
Honored ContributorDiffrerential Pins topology
Hi I want to interface my FPGA to a DAC using LVDS Standard. The problem is, that the FPGA and DAC pins topologies are not the same. Each FPGA positive pin cannot be directly (physically) conne...
Altera_ForumHonored Contributor
Honored ContributorGuys thanks for your answers. I inverted the inputs of the LVDS Block and, at least in the simulation, everything looks fine .
