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Altera_Forum
Honored Contributor
Honored ContributorDiffrerential Pins topology
Hi I want to interface my FPGA to a DAC using LVDS Standard. The problem is, that the FPGA and DAC pins topologies are not the same. Each FPGA positive pin cannot be directly (physically) conne...
Altera_ForumHonored Contributor
Honored ContributorNegating signals is, AFAIK, the only solution.
It's possible that you come across some issues which may require a bit of care but nothing serious. For example, you can't invert the output of altddio_out block -- your have to to invert the inputs.
