Differences between accesing to HPS SDRAM from FPGA vía F2H and F2H_SDRAM

Yes, but everytime i use f2h_sdram bridge i do the following tho things:

- Reduce linux memory usage in uboot

- From fpga i only acces to the memory not used by the OS

But can i still have problems if i create the linux frame buffer out of the linux 's used memory?

Are you refering to cache coherency problems?

Thank for the info, im not able to memorize all the soc datasheet xD

I think that its easier and takes less headache to use the f2h_bridge instead of the f2h_sdram one because the response itş still fine