Developing my own board: Where do I begin?

You'll notice, that the parallel flash (I guess, you intend to use Active Parallel configuration scheme) and DDR2 interface constrain your design to some degree. E.g. IO placement restrictions come into play with the DDR2 voltage referenced standards, AP has a lot of fixed pins.

Thus it's important, that you check acceptance of your pin placement with a reference design ported to your hardware. Existing evaluations boards are not necessarily a good reference, they sometimes have built-in IO placement conflicts.