Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

DESign.sof

Hello! I have a little problem whit a design file, i have a Stratix II board model: EP2S60F672C3 and when i open my design file DESign.sof whit the Programmer in Quartus II i see the file whi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

--- Quote Start ---

Pletz

Nois or Nios? You mean Nios II processor? id like to learn making one... :)

--- Quote End ---

Yes, I mean the the Nios II processor. It lookslike that he is used in the tutorial. Is there no description in the tutorial how to generate the Nios II ? I would expect that the required design files are somewhere in the tutorial database.