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Altera_Forum
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17 years ago

DESign.sof

Hello! I have a little problem whit a design file, i have a Stratix II board model: EP2S60F672C3 and when i open my design file DESign.sof whit the Programmer in Quartus II i see the file whi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

A FPGA configuration file can't be converted to another device type, it has to be generated from the original project files. The appended files however aren't a complete project.