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Altera_Forum
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12 years ago

Design of an FPGA based bit error rate tester

Hello. I am looking into making an FPGA based BERT for some lab testing based on this article http://www.physics.smu.edu/web/research/preprints/smu-hep-11-14.pdf I found on the web. I am not an FPGA ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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I have little experience with FPGA programming so that is why I was looking for some type of open source software or at least an interface that I could learn without needing years of FPGA experience.

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Determine whether any of the boards are within your price-range, and then I'll create a 10Gbps transceiver example for it to confirm it can meet your requirements. That will ensure that the device on the board you order has the appropriate speed grade to support the lane rates you are interested in.

Cheers,

Dave