Design example transceiver Cyclone V GT

Hi,

By looking at the error messages, it seems to relate to the XCVR serial input and output pins are not properly connected at the top level. Note that the XCVR pins must be exported from the Qsys and directly connected to XCVR pins in the design.

By the way, I understand that there is a 4 lane design example for SV device. Probably you could try to refer to it to see if can find any clue with your error.