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Altera_Forum
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11 years ago

Design example transceiver Cyclone V GT

Hi, I would like to debugging a cyclone V Gt board with transceiver toolkit examples. I work with Quartus II V13.1.4 Build 182. I taked here : http://www.altera.com/support/examples/on...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Hi,

It's impossible to instantiate four times the QSYS block because you have to use the same reconfig block within the same transceiver block. We must change the QSYS to multiply the different IP (pattern generator, adapator timing pattern checker etc).

I did regeneration and I have theses errors on analysis and synthesis. I tried several version of Quartus II (12.1 SP1, 13.1.4, 14.0), i tried to delete et regenerate the IP custom_phy..