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anm's avatar
anm
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Design decision about OpenRISC and SDRAM clocks.

Hi, I am implementing a custom design on a DE0-CV board, of an OpenRISC processor. I want to connect the OpenRISC Processor to an onboard SDRAM. The SDRAM has its own controller. This controller ha...
AnilErinch_A_Intel's avatar
AnilErinch_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi

It looks like you are looking for an answer to the question like whether over clocking the RAM over CPU is advisable.

Which is heavily dependent on what kind of application you want to build.

Also if you are able to achieve the timing closure , there are no limitations to different frequencies being used in different buses.

Thanks and Regards

Anil