Delete the color notification after using 'locate in Chip Planner"

Dear all,

After right-clicking a design hierarchy and choosing a "locate->locate in Chip Planner", the resource used in FPGA to implement the design can be notated by a color. However, when I close the chip planner window and reopen it, the color notation is still there. How to eliminate such color notation and go back to the display before using "locate->locate in Chip Planner"? Thanks very much for your help on it.

Best,