DEAD TIME TO CONTROL 2 SYNCHRONOUS MOSFET (BUCK CONVERTER) help!!!!!!!

I've built a similar process for a resonant converter. As Tricky said the dead time has to be expressed in numbers of clock cycles. However, you should also include an external device (external to the fpga) to prevent cross conduction. This is because FPGAs can occasionally glitch and that may cause both outputs to go high unintentionally, and that would cause a short across your FETs. The way I did this is by using a triple NOR gate chip (something like 74HC27... i forget the details). You need to make an analog circuit using these NOR gates to ensure that even if both high side and low side signal go high simultaneously, you analog circuit suppresses that. So the analog circuit logic should be if NOR(H,L) = 1, then set H to 0 and L to 0. In this case if H = 1 and L = 1 then the NOR circuit will shutdown both signals.