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Altera_Forum's avatar
Altera_Forum
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13 years ago

DE2: how to use clock divider?

Hello, I was coding clock divider in VHDL and was told that it's not a good idea to do so. How do I use the DE2's onboard clock divider? Thank You
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

--- Quote Start ---

Instead of using a clock divider, use a clock enable instead. It will keep your system in the same clock-domain and make the timing behavior easier to determine by Timequest. 


IF (rising_edge(CLOCK)) THEN
  IF (clock_enable_s = '1') THEN
    --Stuff Here
  END IF;
END IF;

Just pulse the enable when you want an operation to be done and it should behave much like a clock division.

Hope this helps.

--- Quote End ---

Sorry for my terminology, that's what i would have used. My problem was trying to make a 25.175MHz clock from a 50MHz clock. I have no idea how to do this.

I can see that i'd need to divide by 2.298850574712644 to make that clock.

and i dont think there's any synthesizible way to do that?