Forum Discussion
DE2 board USB communication
Hello people,
I'm curious to know is there anyone who have experience with DE2 board USB communication ? There is some ISP1362 USB-OTG controller which must be appropriate configured in order to communicate with USB device plugged into DE2 USB connector. Does anybody worked with this controller using VHDL programming language ? Is there a lot of problem to configure ISP1362 USB-OTG controller ? Thank you very much, Bojan34 Replies
- Altera_Forum
Honored Contributor
I assume that you are using tmp to detect a change in buffer_full ?
In that case, in the clocked part put something like:
Don't forget to give an initial value to tmp. And choose another name for tmp, to make your code more readable and maintainable. Something like 'active' or 'enabled' as an example.if (tmp = '0') and (buffer_full = '1') then tmp <= '1'; -- do your start stuff here end if; - Altera_Forum
Honored Contributor
i know the clock process, but i dont know how to use it to check buffer_full. Can you explain more, thanks...
- Altera_Forum
Honored Contributor
You need to write a clocked process and check the status of buffer_full. Don't use a while' use a if instead. If buffer_full is 0 then you don't do anything, if it is 1 then you start.
If you need to do more complex operations after that, it could be easier to do with a state machine. - Altera_Forum
Honored Contributor
i'm trying to do DMA mode, that can read and write data, when buffer_full = '1' then it can start, my teacher said cannot use "wait until"... should i give you my whole code?
- Altera_Forum
Honored Contributor
you don't have any pause in your loop, so if buffer_full is 0, then you will get stuck in the loop indefinitely.
What are you trying to do? - Altera_Forum
Honored Contributor
while (tmp = '0') loop
if (buffer_full = '0') then tmp <= '0'; elsif (buffer_full = '1') then tmp <= '1'; end if; end loop; Error: loop must terminate within 10000 iterations Error: can't elaborate top-level user hierarchy anyone who can help me find where is my mistake? thanks veryu much - Altera_Forum
Honored Contributor
aaaa:(, then how to do now, i'm crying la
- Altera_Forum
Honored Contributor
I think that learning VHDL and use it to implement the USB protocol in two weeks is a bit optimistic, yes.
- Altera_Forum
Honored Contributor
thanks, but i only have 2 weeks to finish the project, and it is too busy right?!
- Altera_Forum
Honored Contributor
I think you should learn about VHDL programming first, then you try to implement simple design in FPGA. After that you move to your true project. One of recommended books to learn VHDL is Circuit Design with VHDL by Volnei A. Pedroni.