Forum Discussion
Occasional ContributorDE2-115 Maximum Clock Speed
Hi ,
The DE2-115 uses Cyclone IV FPGA , so the PLL frequency depends up on the data sheet specification of Cyclone IV FPGA .
Kindly find the page no: 24 of the below document for the pll specification.
Occasional ContributorHI Rahul,
I understand that I am able to reach 200MHz because I can see the 200MHz waveform on my Oscilloscope. However, past 200MHz I begin to reach the Bandwidth limit on my oscilloscope so I cannot confirm one way or another if I am actually reaching the speeds at which I am programming the PLL.
So my questions are the following:
What is the Maximum Operating Frequency that the DE2-115 can operate at without experiencing errors?
What is the maximum frequency output I can get from the PLL?
This is the first time that I am multiplying the clock on an FPGA. I am aware that the FPGA itself is optimized to run at 50MHz but I do not know how far I can push the operating frequency before it starts to behave incorrectly.
