DE2-115 and Terasic High Speed AD/DA daughter card

Hi Guys, Thank you all for clarifications and your time. I have worked with DE0-Nano and its ADC and because of its perfect User Guide there were not big problems and it was more simpler because of having NO HSMC connection.

One more point, I am using the AD/DA conversion card and it is different with THDB-ADA.

What I have done so far, I have used pin assignment of sample project of terasic for DE2-115 board and AD/DA conversion card.

Why I can not use the example project structure for my design because it is totally different with my purpose. In the terasic example they produce 1 Mhz and 10 Mhz sinusoidal signal and then transfer it through AD input to DA input. So far I only need to use AD input for my project to convert Analog signal to Digital and limit it somehow with FPGA.

With thanks to Dave for many instructions I have below questions:

1- I have used Terasic example pin assignment for my design, Is it OK? I suppose it is ok because AD input pins are same? Isnt it?

2- There are many other signals which I do not know which one is necessary for a simple AD project like as

clk : in std_logic;

ADA_DCO : in std_logic;

ADA_OE : out std_logic;

ADA_OR : in std_logic;

ADA_SPI_CS: out std_logic;

AD_SCLK : inout std_logic;

AD_SDIO : inout std_logic;

FPGA_CLK_A_N: inout std_logic;

FPGA_CLK_A_P: inout std_logic;

but anyway I have assigned them as terasic sample project.

3- Which clock signal should I use? There are many clock signals like as

clk,

AD_SCLK,

FPGA_CLK_A_N,

FPGA_CLK_A_P,

CLKIN1,

CLKOUT0

Some questions maybe seem simple and funny for you guys but it is difficult for me. I am here to learn and hope you help me with your knowledge.

Regards