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What I did is I added tri_state_bridge in SOPC and automatically it connected the tri_state_bridge.tristate_slave to the Avalon bus master (Nios II cpu.data.master and cpu.instruction.master ).
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That's fine
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However, the other tri_state_bridge.master is left without connection, and this gave me an error. Also, how can I build my own SRAM model?
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You must connect this to a sram component model. Browse sopc standard components; you should have at least a sram model (probably a Cypress CY7C1380). Add it to sopc system, connect to tristate bridge and generate. The generated system will expose sram interface port and you'll have to route them to proper fpga pins.
In case the provided sram mode doesn't meet your needs, use the template I attached.
Rename the way you want, but remember to keep the *_hw.tcl suffix, which is mandatory, otherwise sopc builder won't find it. Change the parameters inside the file in order to match your sram device, then copy to altera\<version>\ip\user_components.
The next time you start sopc builder you'll find the sram component in the list and you only need to add it to your system.
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