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Altera_Forum
Honored Contributor
8 years agoHi qtj000,
Apologize in advance since I’m not an expert in NIOS application. Did you check if there is an output clock from the ALTPLL itself? From the screen shots, there is no areset conduit at the ALTPLL component in the Qsys. The ALTPLL requires the areset to be pull to low all the time. If there is no output clock from the ALTPLL itself, then surely there is no input clock to the accelerometer IP in order for the IP itself to be running. Regards, nyusof (This message was posted on behalf of Intel Corporation