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Altera_Forum
Honored Contributor
10 years agoDE0-nano SPI slave device
Hello all, I'm interfacing my DE0-nano with a micro-controller using SPI protocol. The FPGA is acting as a slave and the Micro-controller as a master. All the input signals of the SPI (M...
Altera_Forum
Honored Contributor
10 years agoI think Cris' 'raw' solution is the most elegant. Launch your MISO data back to the micro at a different point in the SCLK cycle. Assuming you're operating your spi slave module from the 100MHz clock, you have 20 different options (20 different 100HMz clock cycles in your target 5MHz SCLK speed) from which to launch the data. So, you can 'position' your MISO data, w.r.t. SCLK with 10ns accuracy.
Cheers, Alex