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10 years agoHi Nachodizz990,
Thanks for information. My QSYS system looks as follows: Apart of standard blocks like: -Cyclone V Hard Processor System -JTAG to Avalon Master Bridge -JTAG UART (connected to f2h_irq0) -System ID Peripherial -PIO (Parallel I/O – pio_led), I have the following own blocks in QSYS: -SPI Master (Altera’s 3 Wire Serial) -SPI Slave (Altera’s 3 Wire Serial) -My_counter (modulo 32 bits) -Merlin IRQ Fanaout (Altera’s IP) Merlin IRQ’s Senders are connected to Cyclone_V_Hard_Processor_System’s f2h_irq1 (irq Number=2), and to the LED (to let me see when interrupt is active). Merlin IRQ’s Receiver is supplied by My_counter’s overflow flag. The idea is that after power up the 32-bit counter counts up to maximum and an overflow flag is output to the LED and f2h_irq1. The second source of interrupts, connected to Cyclone_V_Hard_Processor_System’s f2h_irq1 consists of two blocks: - SPI Master (irq Number=1) and - SPI Slave (irq Number=0) Their ports are assigned to FPGA’s GPIOs and the wired on the board level in the way that SPI Master will send the data to SPI Slave and SPI Slave hopefully generates an interrupt. Whole design was synthesized, and FPGA was programmed successfully by soc_system.sof. I copied soc_system.sopcinfo to Nios Eds Shell folder. Then, in the Nios Eds Shell, I ran sopc-create-header-files command. I noticed that the following header files were been generated: -fpga_only_master.h -hps_0.h -hps_0_arm_a9_0.h -hps_0_arm_a9_1.h -hps_0_bridges.h -hps_only_master.h -soc_system.h I replaced all original header files, in the given example HPS_FPGA_DIPSW_LED/headers, by above newly generated files. However, when I compile main.c, I get the following: make all arm-linux-gnueabihf-gcc -g -Wall -IC:/altera/15.1/embedded/ip/altera/hps/altera_hps/hwlib/include -Dsoc_cv_av -Dsoc_cv -c main.c -o main.o main.c: In function 'main': main.c:52:79: error: 'DIPSWITCH_BASE' undeclared (first use in this function) DIPSWITCH_address=virtual_base + ( ( unsigned long )( ALT_LWFPGASLVS_OFST + DIPSWITCH_BASE ) & ( unsigned long)( HW_REGS_MASK ) ); ^ main.c:52:79: note: each undeclared identifier is reported only once for each function it appears in main.c:54:73: error: 'LED_BASE' undeclared (first use in this function) LED_address=virtual_base + ( ( unsigned long )( ALT_LWFPGASLVS_OFST + LED_BASE ) & ( unsigned long)( HW_REGS_MASK ) ); ^ make: *** [main.o] Error 1 As I guess, the reason is that I don’t use DIPSWITCH_BASE and LED_BASE in my system any more. In main.c, I should replace them by SPI_MASTER_BASE or SPI_SLAVE_BASE found in hps_0.h. However, in hps_0.h, I cannot find any Macros for Merlin IRQ Fanout, which suppose to pass the IRQ from My_counter to f2h_irq1 (irq Number=2). Why? Because they don’t have any bus with address space like SPI master and Slave? How can I get info that there is an interrupt from f2h_irq1 (irq Number=2) (My_Counter's overflow flag)?