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Altera_Forum
Honored Contributor
13 years agoDDR3 Uniphy hang
Hi, I got issue with regards to running single write in sample project using DDR3 uniphy. I am using Cyclone V GT. The projects compiled ok, timing requirements are met, fully constrained(ref...
Altera_Forum
Honored Contributor
13 years agohave you done any successful read/writes?
do you know if the DDR3 is completing and passing calibration? you should run the UniPHY Status signals out of Qsys as a conduit, and run them to LEDs/STP