DDR2 interface between FPGA and MCU

An interface between an MCU and a FPGA can use DDR signalling with several votalge standards possible. DDR2 is specific for Synchronous SDRAM and has the SSTL-1.8 requirement.

A1) No. It is probably totally inappropriate.

A2) Yes.

A3) You should be able to use series termination, especially if you have unidirectional interface(s). You can also do series termination for bidirectional interfaces, but you have to account for the remote series resistor in the rise time/delay of the signals. If you implement the series termination resistor in the FPGA for a bidirectional pin, this resistor will only be seen/active in the output path. A discrete termination on the MCU side will be add a delay in both directions.

A4) A 'series termination resistor' is always on the TX-side.

Q: what MCU do you want to interface?