Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

DDR input without DPA in Arria II GX

Hello I am using arria ii gx to communicate with a high speed device. The device is sending DDR data, data with a data clock, dclk. dclk and data are source synchronous. I need to capture the d...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Friends,

fyi, I got rid of fitter errors with the help of following posts

http://www.altera.com/support/kdb/solutions/rd07142008_32.html

http://www.altera.com/support/examples/functionality/pll-clocking-stratix3.html

- How would I "defparam" these dpa_divide_by and dpa_multiply_by when I dynamically configure my PLL through scan chain control; I do not know what entry in configuration .mif file corresponds to these parameter?

- I am never getting rx_dpa_locked asserted in my simulations, any idea why?

Regards,