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Altera_Forum
Honored Contributor
16 years agoDDR input without DPA in Arria II GX
Hello I am using arria ii gx to communicate with a high speed device. The device is sending DDR data, data with a data clock, dclk. dclk and data are source synchronous. I need to capture the d...
Altera_Forum
Honored Contributor
16 years agoI used it in virtex iv .. here is an instantiation
IDELAY # ( .IOBDELAY_TYPE ("VARIABLE"), .IOBDELAY_VALUE (`DQ_DEFAULT_DLY) ) IDLY_inst_[`data_width-1:0] ( .O (idly_out[`data_width-1:0]), .I (DDR_DQ[`data_width-1:0]), //ADC Data .C (CLK), .CE (dq_idelay_ce[`data_width-1:0]), .INC (dq_idelay_inc[`data_width-1:0]), .RST (dq_idelay_rst[`data_width-1:0]) );