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Altera_Forum
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16 years ago

DDR input without DPA in Arria II GX

Hello I am using arria ii gx to communicate with a high speed device. The device is sending DDR data, data with a data clock, dclk. dclk and data are source synchronous. I need to capture the d...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

FvM

IDELAY in Xilinx allows delays in multiples of 50ps to be inserted in an I/O pad and that is what I meant. My apologies for using incorrect word.

Regard,