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Altera_Forum
Honored Contributor
16 years agoDDR input without DPA in Arria II GX
Hello I am using arria ii gx to communicate with a high speed device. The device is sending DDR data, data with a data clock, dclk. dclk and data are source synchronous. I need to capture the d...
Altera_Forum
Honored Contributor
16 years agoJake
The DDR clock and data from the device will come into the FPGA when the FPGA board is connected to the other board. However, I plan to run the FPGA using a clock from an on-board (FPGA board) oscillator. That should not be a problem, right?