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lidongyang's avatar
lidongyang
Icon for New Contributor rankNew Contributor
2 years ago

DDR EMIF support 256bits data width for RDIMM x4?

Hi Intel, Do you know how to create EMIF using qsys that support for 2 AXI masters with different data widths (256bits and 512bits) on RDIMM x4?
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AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


By default ctrl_amm_0 data width cannot be changed.

But you may able to create a generic component based on the EMIF IP so that you would be able to configure the data width to 256 bits.

I'm sharing a video link related to generic component as blackbox in Qsys: https://www.youtube.com/watch?v=mlTlGEXYpsU




Regards,

Adzim