DDR EMIF support 256bits data width for RDIMM x4?

Hello,

Thank you for submitting your question in Intel Community.

I'm Adzim will assist you in this forum.

"Do you know how to create EMIF using qsys that support for 2 AXI masters with different data widths (256bits and 512bits) on RDIMM x4?"

• I think it's possible by adding two modules for 256bits and 512bits and connect to EMIF memory controller.
• I don't think we provide the guideline to create this design but somehow you may ask based on IP or module usage.

Regards,

Adzim