Skip to contentBrand Logo
Forums
BlogKnowledge BaseAltera.com
RegisterSign In
  1. Altera Community
  2. Forums
  3. FPGA Device

Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

DDR burst query

Can anyone tell me why DDR supports only burst transactions.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Efficiency.

Recent Discussions

  • arik's avatar
    CPRI F-Tile Dynamic Reconfiguration
    12 hours ago
    arik
  • KentLam's avatar
    300 Your license version is outside the range of the contract
    Solved
    20 hours ago
    KentLam
  • Santoshmbca's avatar
    Part no query-5CEFA9F31I7NFA
    22 hours ago
    Santoshmbca
  • Aravindvelu's avatar
    I need a clarification on the PCN#ADV2516
    1 day ago
    Aravindvelu
  • wangduoyu's avatar
    [Agilex 5] Global Clock assignment ignored for PLL output clock with high fanout
    1 day ago
    wangduoyu
Contact Us
Altera YoutubeAltera YoutubeAltera Twitter
  • Company Overview
  • Newsroom
  • Our Leaders
  • Careers
Subscribe to Altera Newsletter

© Altera Corporation | Terms of Use | Privacy Policy | Cookies | Trademarks | PSIRT

Altera Logo