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GLees's avatar
GLees
Icon for Contributor rankContributor
3 years ago

DDIO Input Speed Cyclone V vs. Cyclone 10GX

When I create a simple DDIO input for both the Cyclone V and Cyclone 10GX parts, the Cyclone V has an Fmax about twice the Cyclone 10GX. Cyclone V, Fmax ~ 400Mhz Cyclone 10GX, Fmax < 200...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Greg,


Thank you for your feedback.


FYI, the Fmax is only based on setup timing, while the Restricted Fmax is based on setup, hold and minimum period/pulse width timing.

The timing violation in the design will limit the Fmax and the Restricted Fmax.

If the design can get a clean timing, then the Fmax should be better.


If you cannot close the timing or the data rates are more than 200 Mbps, Intel recommends that you use the PHYLite for Parallel Interfaces IP core.


Regards,

Adzim


GLees's avatar
GLees
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3 years ago

It seems odd, almost unbelievable, that the max data rate for the Cyclone 10GX is half the speed of the Cyclone 10LP and Cyclone V. The PHYLite appears to utilize the GX transceivers and is very much overkill for my application. I'm trying to design a 64 bit, DDR, source-synchronous deserializer with an input clock rate of 350Mhz.