Forum Discussion
Altera_Forum
Honored Contributor
16 years agodata error!help
look at the picture,why CpuData is wrong,but RdBuf is right, assign CpuData = ( CpuDataVld &HRCW_over_flag )? {8'h00,CpuDataOut} : 16'hzzzz ; assign RdBuf = ( CpuDataVld &HRCW_over_flag )? CpuDa...
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- Sorry , maybe I was a little too fast. Is your picture a signaltap or a simulation output ? Can you zoom in so that it is possible to see all value ? Kind regards --- Quote End --- Hi, you mentioned that RdBuf is a "reg", but as far as I know you can't use "assign" for reg. assign RdBuf = ( CpuDataVld &HRCW_over_flag )? CpuDataOut : 8'hzz ; CpuData is a Toplevel port ? What is connected to this port ? assign CpuData = ( CpuDataVld &HRCW_over_flag )? {8'h00,CpuDataOut} : 16'hzzzz ; According to your assignment CpuData is only during CpuDataVld "1" = CpuDataOut. With CpuDataVld "0" you switch back to "z". Maybe somebody is driving the port ? Can you zoom in your traces, in orde to see what values are caaptured ? Kind regards GPK