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Altera_Forum's avatar
Altera_Forum
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16 years ago

dangling port&logic

hello .

i wrote a program, then i compile it. and it is compiled properly.

this program has 4 entity. after compliation, i could see entity-4 in RTL viewer but there isn't in technology map viewer completely. further more it hasn't any output. when i checked the "connectivity checks" it reveals that the following info:

Connected to dangling logic. Logic that only feeds a dangling port will be removed.

thank you.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    hello.

    I could find the problem. i inadvertently commented one of control outputs then the next entity that works with it was dangled.