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Altera_Forum
Honored Contributor
16 years agoYou can't force the pin to stay low before the user mode. All the pins are set to weak pull-up during configuration an no settings in the Quartus project will change that, for the simple reason that until the configuration is loaded the FPGA doesn't know what to do with his pins yet.
The only solution is to put an external pull down on the PCB. Check the internal weak pull-up value in the Cyclone III datasheet, because it's not as weak as that. As an example for a 3.3V I/O the "weak" pull-up can be as low as 7k, and you need to put an external pull down of 2k or less to guarantee a voltage under 0.8V during power up.