Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCyclone3-Overshoot/Undershoot
Hi, After PCB Design CIII – EP3C40 based board, in the post routing SI Simulation we are getting some overshoots and undershoots in DDR Signals and LVDS (As receiver) signals. As we are using DDR1 s...
Altera_ForumHonored Contributor
Honored Contributorin 5 data signals of the ddr we are also getting cross talks above 150mv but it is within 200mv. can it be an issue in future?
Regarding the waveform of the LVDS signals, I also feel there was something wrong in the SI Simulation or in the IBIS model of the LVDS driver. Because the waveform we got using the IBIS model of 3.3v lvds transmitter ds90c3201 is much better and the voltage at the receiver pin is within 1.1V & 1.6V with the crossing point at 1.39V. But still the waveform shows some ringing for the differential termination of 100 Ohms. i want you to comment on this waveform – whether there will be any issues because of these ringing?
