Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou should start by reading some stuff on vhdl entity declarations, what ports are :rolleyes: . Then look for port maps for top level designs . You probably need a top module where you instantiate all your premade modules (audiocodec, filter ,...). In the top module you link your modules with port maps. If you don't know how a FIR filter somehow works, look it up?