Cyclone V SX SoC - DMA Controller Peripheral Request Interface

Dear ankpradh,

how does the user interact with your driver , so what is the high level application.

I think in the dma driver there is the debugfs interface used,or in some other example driver . With this debugfs interface you can start an write or read to/from the FIFO via command line.

So what happens if you trigger something from debugfs?

0.)debugfs function is called

1.)Register of fifo will be read (length information)

2.)The DMAC will be configured for this DMA Peripheral Request

3.) An "start" bit will be set in the "CSR" or named similar

4.) The fifo control logic sets the DMA Peripheral Request Interface signals (tx_single,tx_burst, rx_single,rx_burst)

5.) The dmac does the configured stuff ..

So if you need two threads depends on which application you have? Again: What is the target of this project?