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Shoval's avatar
Shoval
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Cyclone V SoC GSRD precompiled SD boot failure

Hello all, I have recently tried to execute the GSRD on the Cyclone V SoC (https://www.rocketboards.org/foswiki/Documentation/CycloneVSoCGSRD) , the first step is to boot a precompiled SD image. I ...
Configuration
  • Shoval's avatar
    Shoval
    2 years ago

    Hello Aik,

    After checking the pin configurations you provided - nothing actually booted --> No UART prints on putty of any kind.

    Setting the following:

    J26: Short pins 1-2
    J27: Short pins 2-3
    J28: Short pins 1-2
    J29: Short pins 2-3
    J30: Short pins 1-2

    And the rest as you instructed:

    J5: Open
    J6: Short
    J7: Short
    J9: Open
    J13: Short
    J16: Open

    SW1: All OFF
    SW2: All OFF (modified)
    SW3: ON-OFF-ON-OFF-ON-ON (modified)
    SW4: OFF-OFF-ON-ON (modified)

    I was able to successfully boot and load FPGA from u-boot.

aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Shoval,


Sorry that I do not undertand your respond. No UART logs after following the MSEL and SW settings?

However you were able to successfully boot and load FPGA from u-boot?


Thanks.

Regards,

Aik Eu


Shoval's avatar
Shoval
Icon for New Contributor rankNew Contributor
2 years ago

Hi Aik,

Setting the following:

J26: Short pins 2-3

J27: Short pins 2-3

J28: Short pins 2-3

J29: Short pins 2-3

J30: Short pins 2-3

Results in no load at all, not FPGA load and not u-boot/Linux boot, what I meant is that powering up the board using those configuration results in empty Putty with no prints at all.

The configuration that works for me - successfully boot and FPGA load is the following:

J26: Short pins 1-2
J27: Short pins 2-3
J28: Short pins 1-2
J29: Short pins 2-3
J30: Short pins 1-2

J5: Open
J6: Short
J7: Short
J9: Open
J13: Short
J16: Open

SW1: All OFF
SW2: All OFF
SW3: ON-OFF-ON-OFF-ON-ON
SW4: OFF-OFF-ON-ON