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Altera_Forum
Honored Contributor
10 years agoThis is a problem that has caught me out on too many occasions. I should have learnt by now. Some FPGAs (cough Xilinx cough) have an input pin which dictates what the pins do on power up / programming. I'm sure some Altera devices do too though I haven't come across one myself.
Solutions:- Redesign your circuitry so all pins are active low.
- Add pull down resistor to override pull up in chip. If I remember correctly this has to be around 2k2.