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Honored Contributor
Honored ContributorCyclone V PCIe hard IP? Megafunction required??
Hello, quick question for everyone. I've been looking over the documentation on the Cyclone V PCIe hard IP and not sure if you need to buy a Megafunction to implement a PCIe link on the Cyclone V? T...
Altera_ForumHonored Contributor
Honored ContributorHardened IP is a block of logic in the FPGA that has fixed functionality - e.g. PCI Express. Core logic is general purpose logic configurable to your needs.
See the "pci express protocol (https://www.altera.com/products/intellectual-property/ip/interface-protocols/m-pci-express-protocol.html#device-support---hardened-ip-blocks--generation---link-width-configurations---feature-support)" IP page for a little more info. Cheers, Alex
