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Hi andrei_hres,
The additional channel used by the XAUI core is for the TX PLL. For your information, the transceiver channels required a TX PLL to generate clocks for the transmitter.
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Hi nic_@
Does this mean that in chip with 9 transceivers I cannot implement XAUI and Custom PHY with 4 lines? For this purpose I need use chip with 12 transceivers?
I try different settings for Custom PHY core and find that in my chip I can implement XAUI + 3 lines Custom PHY.
Is there any configuration for transceivers when I can implement XAUI + 4 lines Custom PHY in chip with 9 transceivers?
Honored Contributor
