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BillP_'s avatar
BillP_
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Cyclone V GX C5 CRC_ERROR pin

I have a vendor (Terasic) board and I turned on the CRC_ERROR pin. Quartus Prime complained that Pin V20 is mapped twice. Is there a reference to the what dedicated pin is mapped to CRC_ERROR for t...
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NurAiman_M_Intel's avatar
NurAiman_M_Intel
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,


Per the device connection guidelines below,


"When you use the dedicated CRC_ERROR pin configured as an open-drain output, connect this pin through an external 10-kΩ pull-up resistor to VCCPGM. When you do not use the dedicated CRC_ERROR pin configured as an open-drain output and when this pin is not used as an I/O pin, connect this pin as defined in the Quartus Prime software. The I/O buffer type is reported in the fitter report."


https://www.intel.la/content/www/xl/es/content-details/714106/cyclone-v-gx-gt-e-sx-st-and-se-device-family-pin-connection-guidelines.html


I don't understand what this has to do with Pin V20?


Regards,

Aiman