Forum Discussion
Cyclone V FPGA configuration
- 3 years ago
Once the processor is booted, it can be used to program the FPGA part of the device at any time.
MSEL pins: not sure why you're thinking they would be an issue. They are obviously set in hardware before power on. What is your concern with them?
I get the information from my experience working with the devices, documentation, and training.
https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/fpga-configuration-79225.html
I thought MSEL pins were an issue because my setting is not one of those described in the link of your answer (It's not FFP because FPGA is first configured on power-on from an external device connected through AS). What causes me trouble is the second and entirely new configuration that should be done by HPS.
I understood that when using HPS to configure FPGA, FPGA manager resets the FPGA. Since MSEL pins are sampled during Reset phase and since my MSEL pins setting is not a HPS configuration scheme, I thought that trying to configure FPGA by HPS would not work.
I guess I got it wrong seeing your answer and Fakhrul answer.