Honored Contributor
Honored ContributorHi Dave,
Sorry I did not read carefully your question. I think I'm doing everything you are suggesting and yes I do bit swapping. Here is the setup: 1. I have two identical boards with Cyclone V and SPI FLASH connected to the AS pins. 2. One board has N25Q064 for FLASH- 64Mbit part. 3. The other board has N25Q00 FLASH- 1Gbit part. 4. I can program the 64Mbit FLASH with USB-Blaster and the JTAG programmer using .jic file. After power cycle the FPGA loads via AS and works just fine. 5. I can run NIOS on this board and readback the FPGA programming data. That is how I found about the bit swapping. 6. Using NIOS and my custom SW I can erase the FLASH and program the .rbf file (the NIOS SW is doing the bit swapping on the fly before writing in the FLASH). 7. After power cycle the FPGA loads via AS and works the same as when programmed with USB-Blaster and the jic file. At this point I believe I proved I can write the .rbf file correctly in the FLASH and the .rbf file itself is good. 8. On the second board with the 1Gbit part I cannot use the USB-Blaster to program the FLASH. The JTAG programer does not recognize the 1G part and gives error. 9. I load the FPGA via JTAG and run the NIOS SW (again via JTAG). 10. Now I program the .rbf file in to the FLASH the same way I did on the board with the 64M part - the SW is absolutely the same - it uses the same OPCODES. 11. After power cycle the FPGA tries to load form the SPI FLASH (nSTATUS goes high) but it gives up after about 500us. nSTATUS goes low and then the cycle repeats. DONE pin never goes high. I hope this answers your questions. Thanks, Krassimir
